What the Heck is A... "Half-Flash Analog to Digital Converter" by David L. Jones A common method of converting an analog signal into an associated digital value is to use a "flash" Analog to Digital Converter (ADC). As you may know, a flash converter is very simple in principle. All it does is to simultaneously compare the analog input with a large number of comparators that are set to linear fractions of a reference voltage. Thus, only one comparator will be on at any one time, which is digitally decoded to produce a corresponding binary value that represents the analog voltage at that instant. Flash converters have the great advantage of fast conversion speed, but one of their major limitations is that they require a large number of comparators and associated decoding circuitry. In fact, a flash convertor requires 2ü comparators and resistors (where 'n' is the number of bits in the digital sample), not to mention the decoding circuit!. So, an 8 bit flash ADC requires 256 comparators, resistors & decoding logic all on a single chip!. The following information will take an 8 bit ADC as an example. However, the half-flash technique is not limited to any particular number of bits. An alternate method called "half-flash" conversion can drastically reduce the number of circuit elements required by a full flash convertor, but will only reduce the conversion time by about half. This can often be a much better option than other conversion techniques such as sucessive approximation. For the mathematically minded, the resultant number of comparators & resistors is in the order of 2^(n/2). As the name may suggest, the half-flash technique uses dual flash converters that only require HALF the total number of bits. Therefore an 8 bit half-flash ADC requires two 4 bit flash converters, a 4 bit DAC and an 8 bit latch, as shown in the accompanying block diagram. This makes it a lot simpler to manufacture, and gives it a speed capability somewhere between full flash and successive approximation. As a 4 bit flash only requires 16 comparators, the half-flash ADC only requires 32 comparators and resistors as opposed to 256 in a full 8 bit flash. This lowers the chip complexity and cost significantly. The basic principle of operation is as follows : The most significant 4 bit ADC converts the voltage from the sample and hold, and produces a corresponding 4 bit digital code. This value is put into the most significant latch. This 4 bit nibble, representing a "low resolution" sample of the input, is put into the most significant latch. At the same time, it is converted back into an analog voltage by the DAC. This "approximate" voltage is then subtracted from the sampled input voltage, which produces an "error" or difference voltage. This difference voltage is then converted into another 4 bit digital value by the least significant ADC, which is referenced to 1/16th (2^(n/2)) of the reference voltage used by the most significant ADC. This value is then put into the least significant latch. The 8 bit latch now contains an 8 bit digitised value of the input voltage. This gives the same result as a full 8 bit flash, but it just takes a bit longer. One advantage of this technique is that if you require a faster speed and only need 4 bit resolution, then the most significant latch can be read out straight away, as it acts just like a normal 4 bit flash. So with a half-flash ADC, you have the option of selecting between a fast 4 bit converter or a slower 8 bit version for higher resolution. Some half-flash techniques use only one 4 bit flash ADC and "reuse" it for both the most significant & least significant conversions. This is done by providing additional sample & holds, and then switching these internal sample values alternatively into the one ADC. So as you can see, half-flash ADC's are great fun. Go out and build one today!.